Welcome to Electron Devices Society–Santa Clara Valley/San Francisco Chapter


Ferroelectronics for next generation memory and NAND storage technology

The Electron Devices Society Santa Clara Valley/San Francisco joint Chapter is hosting Prof. Asif Khan. The title of the lecture is ‘Ferroelectronics for next generation memory and NAND storage technology’

When/Where: 19th Jan, 2024, 12 noon. Hybrid event (Venue: Atherton Room, Plug and Play Tech Center, 440 N Wolfe Rd, Sunnyvale, CA 94085)

Note: MUST RSVP to attend in-person

Registration: Link

If you face an issue with vtools registration send an email to hiuyung.wong at ieee.org to get the zoom link and indicate whether you are an IEEE member, IEEE EDS member, IEEE Student member

Contact: hiuyung.wong at ieee.org

Speaker: Prof. Asif Khan


The rise of artificial intelligent (AI)-driven marvels hinges on the unrelenting advances in digital memory and storage solutions. The exponential trajectory of improvements of dynamic random-access memory (DRAM) and NAND flash, which are the mainstays of main memory and storage, respectively, is however facing formidable challenges at the technology level.

In this talk, we will discuss the potential of the emerging ferroelectric technologies to upend the DRAM and NAND landscapes [1-3]. We will highlight how ferroelectrics can enable the transition from 2-D to 3-D in DRAM technology and facilitate vertical scaling in NAND technology to achieve the 1000-layer milestone and beyond. We will also explore how ferroelectric devices can contribute to embedded and storage class memory technologies and examine the challenges they face.

[1] Asif Islam Khan, Ali Keshavarzi, and Suman Datta. “The future of ferroelectric field-effect transistor technology.” Nature Electronics 3.10 (2020): 588-597.

[2] Dipjyoti Das, Asif Khan et al. “Experimental Demonstration and Modeling of a Ferroelectric Gate Stack with a Tunnel Dielectric Insert for NAND Applications.” Proceedings of the 2023 IEEE International Electron Devices Meeting (IEDM).

[3] Nirmal Ramaswamy et al. “NVDRAM: A 32Gb Dual Layer 3D Stacked Non-volatile Ferroelectric Memory with Near-DRAM Performance for Demanding AI Workloads.” Proceedings of the 2023 IEEE International Electron Devices Meeting (IEDM).

Speaker Bio:

Asif Khan is an Associate Professor in the School of Electrical and Computer Engineering with a courtesy appointment in the School of Materials Science and Engineering at Georgia Institute of Technology. Dr. Khan’s research focuses on ferroelectric materials and devices to address the challenges faced by the semiconductor technology due to the end of transistor miniaturization. His work led to the first experimental proof-of-concept demonstration of the ferroelecric negative capacitance, which can reduce the power dissipation in transistors. His recent interest is understanding and demonstrating the fundamental limits of memory technologies concerning their scalability, density, capacity, performance, and reliability. His group publishes research on topics that include both logic and memory technologies, as well as artificial intelligence and neuromorphic hardware.  Dr Khan’s notable awards include the DARPA Young Faculty Award (2021), the NSF CAREER award (2021), the Intel Rising Star award (2020), the Qualcomm Innovation Fellowship (2012), TSMC Outstanding Student Research Award (2011) and University Gold Medal from Bangladesh University of Engineering and Technology (2011). Dr. Khan received the Class of 1934 CIOS Honor Roll award for excellence in teaching a graduate course on Quantum Computing Devices and Hardware in Fall 2020. He is presently serving as an editor at IEEE Electron Device Letters. In the past, he has also worked as an associate editor for IEEE Access, and as a technical program committee member for various conferences including IEEE International Electron Devices Meeting (IEDM) and Design Automation Conference (DAC), among others.


More information at the IEEE EDS Santa Clara Valley-San Francisco Chapter Home Page

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