Santa Clara Valley-San Francisco Chapter of Electron Devices Society (Silicon Valley, California)

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Welcome to Electron Devices Society–Santa Clara Valley/San Francisco Chapter


IEEE-EDS October Seminar Series (Webex only)

Title: Coupled Oscillator based Computing: Using Nature to Solve Difficult Problems

Speaker: Prof. Chris H. Kim, University of Minnesota

Friday, October 30, 2020 at 11AM – noon PDT

Register Here

Webex link will be distributed to the registrant via email.
Organizer contact: Jin-Woo Han (jin-woo.han@nasa.gov)

Abstract:
In this talk, I will introduce a first-of-its kind quantum-inspired coupled oscillator based compute engine implemented in a standard 65nm technology targeted for NP-hard or NP-complete problems such as max-cut, graph coloring, traveling salesman, and pattern recognition. The NP-hard problem is first mapped to the coupling weights while the solution is represented by the phases of the individual oscillators, which are read out using on-chip phase sampling circuits. Our hardware exploits the natural tendency of a network of coupled oscillator to settle to the ground state, which offers significant performance and power advantages compared to traditional digital approaches.

Speaker Bio:
Chris H. Kim received his B.S. and M.S. degrees from Seoul National University and a Ph.D. degree from Purdue University. He is currently a professor at the University of Minnesota. Prof. Kim is the recipient of the University of Minnesota Taylor Award for Distinguished Research, SRC Technical Excellence Award, Council of Graduate Students Outstanding Faculty Award, NSF CAREER Award, Mcknight Foundation Land-Grant Professorship, 3M Non-Tenured Faculty Award, DAC/ISSCC Student Design Contest Award, IBM Faculty Partnership Award, IEEE Circuits and Systems Society Outstanding Young Author Award, the ICCAD Ten Year Retrospective Most Influential Paper Award, ISLPED Low Power Design Contest Award (4 times), and ISLPED Best Paper Award (2 times). His group has expertise in digital, mixed-signal, and memory IC design, with special emphasis on circuit reliability, hardware security, memory circuits, radiation effects, time-based circuits, beyond-CMOS technologies, and machine learning hardware design. He is an IEEE fellow.


More information at the IEEE EDS Santa Clara Valley-San Francisco Chapter Home Page

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