TITLE: Self Healing Nano-Electronics for Nano-Spacecraft in Deep Space Missions

SPEAKER:
Dr. Dong-Il Moon, NASA Ames Research Center
Mountain View, CA

Tuesday, February 7, 2016  11:30 AM – 1:00  pm
Texas Instruments (TI) Auditorium E-1
2900 Semiconductor Drive
Santa Clara, CA map

Admission FREE ($5 donation requested). Please register here.

ABSTRACT:
Small satellites consisting of a set of integrated circuits (IC), i.e., nano-spacecraft, have been introduced recently to solve challenges such as propulsion cost and launch weight. The conventional spaceship takes 18,000 years from Earth to a nearest star, i.e., Alpha Centauri, but the spacecraft-on-a-chip technology dramatically reduces the travel time to 20 years due to its light weight and great energy efficiency. However, high risks of radiation induced damages and mission period over 20 years (longer than usual lifetime of IC) are considered as technology barriers. It is intrinsically impossible to avoid unexpected radiation exposure. The shielding metal adds significant weight, which nullifies the fundamental advantage of the nano-spacecraft. In this talk, self-healing process is introduced for sustainable space electronics. Degradation and recovery mechanisms for total ionizing dose, single event effect, hot carrier, and tunneling stress are discussed in silicon nanowire gate-all-around FETs. Dual contact pads of the gate allow current flow creating heat for on-chip annealing, which recovers interface states and bulk traps in the gate dielectric. The effect of the self-healing is examined for practical applications such as a logic transistor, high-speed DRAM, and non-volatile Flash memory. Therefore, the lifetime of devices can be extended, which opens an opportunity for nano-spacecraft sustainable for more than 20 years of deep space exploration. The technology will have an impact on terrestrial applications with critical requirements as well.

SPEAKER BIOGRAPHY:
Dong-Il Moon is a postdoctoral researcher at the Center for Nanotechnology at NASA Ames Research Center. He was previously a senior engineer of Device & Process Integration Technology Group at SK Hynix (2015). He received Ph.D. (2015) and M.S. (2010) in EE from KAIST, and B.S. (2008) in EECS from Kyungpook National University. His honors include the best Ph.D. thesis award in Department of EE at KAIST (2015), grand prize for thesis award from Lam Research Korea (2014), the best research student award in EE from KAIST twice (2012, 2014). His research includes fundamental and applied aspects of nano devices. He has explored the emerging nanoscale devices in layout, mask fabrication, wafer processing, simulation, and modeling. Especially, he led a research team responsible for developing the suspended silicon nanowire on a bulk silicon substrate, which is used as a basic building block for a nano-scale circuit. Based on the developed novel process, advanced MOSFETs such as a gate-all-around FET, a tri-gate FinFET, and an independently controlled double-gate FET were fabricated, which were utilized for various applications such as a logic transistor, a memory cell, and a biosensor. He has authored or coauthored one book chapter, 70 articles in peer-reviewed scientific journals, and 16 proceeding papers for international conferences.

AGENDA:

• 11:30 am – Registration & light lunch (pizza & drinks)
• Noon – Presentation & Questions/Answers
• 1:00 pm – Adjourn

Please register here.