IEEE CEDA All Japan Joint Chapter was held a special seminar.
Date/Time: 2015 April 16 (Thu) 15:10-16:10
Location: Tokyo Institute of Technology, Lecture Room S323@ 2F, South Bldg.3, Ookayama Cumpus
#35. South Bldg. 3
(1) Lecture: 15:10-16:10
Title: Logic Synthesis: Past and Future
Speaker: Dr. Alan Mishchenko (University of California at Berkeley)
Presentation slide: intro_abc01