Reliability Characterization of Ring Oscillator Circuits in Advanced CMOS Technology Nodes
Dr. Andreas Kerber
Intel, Santa Clara, CA, USA
ON-Semiconductor, Santa Clara, CA, USA
GlobalFoundries, Malta/East-Fishkill, NY, USA
AMD, Yorktown Heights, NY, USA
Infineon Technologies, Reliability and Methodology Department, Munich, Germany
Bell Laboratories, Lucent Technologies, Murray Hill, NJ, USA
TU-Darmstadt, Electrical Engineering and Information Technology, Germany University of Innsbruck, Department of Physics, Austria
Date: Friday, May 27th, 2022
Time: 4:00 PM – 4:45 PM
Followed by coffee and refreshments in Shannon Room, Engineering IV.
Zoom link: https://ucla.zoom.us/j/93140370908?pwd=cXdISzJUZ1ovd0luc2dxSkJLei9qUT09
Registration link: https://www.eventbrite.com/e/333862490697
Lecture Abstract:
Reliability characterization of CMOS technologies is focused on bias temperature instability (BTI), hot carrier injection (HCI) and time dependent dielectric breakdown (TDDB) using discrete n-FET and p-FET test structures. In recent years, the characterization methods for discrete devices were extended from DC to AC to better capture the widely discussed recovery effects and assess lifetime under switching conditions mimicking digital operation.
In this lecture we will focus on reliability characterization of ring-oscillators (RO) representing a basic digital circuit. First, we discuss time resolved RO frequency measurements and its importance in capturing the BTI component in digital circuit aging. Then explore identifying HCI contribution in RO by varying test temperature and using different test structure designs. We also address the relevance of self-heating in the characterization and aging of digital circuits. Finally, we attempt to correlate the aging in discrete thin and thick oxide device to corresponding thin and thick oxide ROs in advanced CMOS technology nodes.
Biography:
Dr. Andreas Kerber received his Diploma in physics from the University of Innsbruck, Austria, in 2001, and a PhD in electrical engineering from the TU-Darmstadt, Germany, with honors in 2014. From 1999 to 2000 he was an intern at Bell Laboratories, Lucent Technologies (Murray Hill, NJ, USA) working on the electrical characterization of ultra-thin gate oxides. From 2001 to 2003, he was the Infineon Technologies assignee to International SEMATECH at IMEC in Leuven, Belgium, where he was involved in the electrical characterization of alternative gate dielectrics for sub-100 nm CMOS technologies. From 2004 to 2006, he was with the Reliability Methodology Department at Infineon Technologies in Munich, Germany, responsible for the dielectric reliability qualification of process technology transfers of 110 and 90 nm memory products. During that time, he developed a low-cost, fast wafer-level data acquisition setup for time-dependent dielectric breakdown (TDDB) testing with sub-ms time resolution. From 2006 to 2018 he was working for AMD in Yorktown Heights, NY, and GLOBALFOUNDRIES in Malta and East-Fishkill, NY, as a Principal Member of Technical Staff on front-end-of-line (FEOL) reliability research with focus on metal gate / high-k CMOS process technology, advanced transistor architecture and device-to-circuit reliability correlation. From 2018 to 2019 he was with Skorpios Technologies in Albuquerque, NM, working on reliability of Si-photonic devices. From Nov. 2019 to March 2021 he was with ON-Semiconductor in Santa Clara, CA working on product quality management of CMOS image sensors for automotive, consumer and industrial markets. Since March 2021 he is with Intel in Santa Clara, CA working on CMOS reliability for 3D-NAND technology.
Dr. Kerber has contributed to more than 110 journal and conference publications and presented his work at international conferences, including the IEDM, VLSI and IRPS. In addition, he has presented tutorials on metal gate / high-k reliability characterization at the IIRW, IRPS and ICMTS. Dr. Kerber has served as a technical program committee member for the SISC, IRPS, IIRW, IEDM, Infos, ESSDERC, is a Senior Member of the IEEE and a Distinguished Lecturer (DL) for the IEEE Electron Devices Society.
For more information, contact Haoxiang Ren at haoxiang.ren@g.ucla.edu
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