IEEE Winnipeg Section


Computer and Computational Intelligence Seminar



FPGAs at 28nm: Technology Challenges Facing the World’s Largest Integrated Circuits


Thursday, August 25, 2011 at 2:00 PM – 3:00 PM


Rm E2-365, EITC (Engineering & Information Technology Complex),
Fort Garry Campus, University of Manitoba


Vaughn Betz, PhD
Associate Professor
Department of Electrical & Computer Engineering
Toronto, ON


A triarchic theory of granular computing is formulated and examined in the light of the most recent research results. The three components are labeled as the philosophy, the methodology, and the computation. It offers a unified view of granular computing as a way of structured thinking, an approach of structured problem solving, and a paradigm of structured information processing, focusing on hierarchical granular structures. Based on results from well-established disciplines, including philosophy, psychology, cognitive science, education, artificial intelligence, computer programming, and many more, the triarchic framework aims at synthesizing the various studies and models into a unified theory of granular computingFPGAs are very early adopters of the latest process technology, and are amongst the world’s largest and most complex integrated circuits. For example, Altera’s 28 nm Stratix V FPGAs contain 4 billion transistors — the most ever on a non-memory integrated circuit.

This talk will describe some of the driving applications and technology trends pushing FPGAs to 28 nm and smaller process nodes. It will also highlight how FPGA architecture is evolving, as exemplified by Altera’s Stratix V FPGAs. Power management and silicon efficiency issues are pushing FPGAs to become somewhat more application-targeted, and to incorporate larger amounts of hard logic that makes them more complete systems-on-a-chip. In addition, the very high I/O bandwidth requirements of next-generation systems and new physical effects in the latest process nodes require innovation in FPGA architecture and circuit design.

Stratix V supports partial reconfiguration to increase silicon efficiency by swapping in different functionality over time. The talk will describe both the hardware that enables partial reconfiguration, and the software tools that will enable efficient design without becoming entangled in low-level physical details. Finally, it will discuss both software challenges and promising research efforts to create CAD tools that will help designers productively create the very large systems enabled by modern FPGAs.

Speaker Bio:

Dr. Betz is currently an Associate Professor at the University of Toronto, with research interests in FPGA architecture and CAD.

Dr. Betz received his PhD from the University of Toronto, his MS from the University of Illinois at Urbana-Champaign, and his BSc from the University of Manitoba, all in electrical engineering. Dr. Betz co-founded Right Track CAD in 1998 to commercialize the VPR CAD system he developed in his PhD. Altera acquired Right Track in 2000, and Dr. Betz became the Senior Director of Software Engineering at Altera, until he joined the University of Toronto in July 2011. He is the architect of the Quartus II place and route engine, and one of the architects of the Stratix and Cyclone FPGA families. He has published over 30 technical papers and holds 61 US patents.


Free, All are welcome.



For questions or more information contact Witold Kinsner at 474-6490.

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