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Events on November, 2019

Machine Learning (Signal Processing!) for Networked Systems

Date: November 14th, 2019

Machine Learning (Signal Processing!) for Networked Systems

Co-sponsored event with Signal Processing Society

Lecture by John Apostolopoulos

VP/CTO Enterprise Networking, and Lab Director for Innovation Labs, Cisco

Event Sponsored and Organized By:

IEEE SPS Chapter of Santa Clara Valley

Co-Sponsors:

IEEE Computer Society

IEEE Information Theory Society

IEEE Communications Society

Circuits and Systems Society (CASS)of Santa Clara Valley

Registration Link: here.

Agenda:

6:30pm-7:00pm: Registration, Food, Networking

7:00pm-8:00pm: Talk

8:00pm-8:30pm: Q&A and Networking

Parking:

Please park in parking structure close to the building on Octavius Drive. First building after passing AMD and the road does a curve to the right. Please walk around AMD building to the Highway 101 side to the visitor entrance.

Cost:

Free

Donations accepted at the door.

Abstract:

It is an exciting time as machine learning (ML) techniques, based on signal processing (SP) and other disciplines, are enabling us to solve a wide range of challenging and valuable problems. In this talk I will share how we are applying ML to improve networked applications, such as interactive video communications and emerging multi-user AR/VR, and networked systems, such as Internet of Things (IoT) systems. A key theme in this talk is to show, via examples, how a modern network provides new sources of data that enables SP and ML experts to solve a diverse set of important problems.

This talk will examine how machine learning (ML) benefits networked systems by highlighting four examples. First, we will examine Intent-Based Networking (a modern architecture for designing and operating a network) and how ML can be used to increase visibility, diagnose problems and identify associated remedies, and provide assurance on application performance. Next, we’ll examine how to understand what devices are connected to the network, which is a key step to providing customized network performance and protecting those devices. In the context of ever-growing security threats, we’ll examine how ML can be applied to address the challenge of detecting malware sneaking in an encrypted flow without requiring decryption of those flows. Lastly, we’ll look at the move from today’s Cloud-based ML to the promising approach of Distributed ML across Edge and Cloud that can lead to improved scalability, reduced latency, and improved privacy for multimedia applications. It is noteworthy that while ML often raises privacy concerns, the last two examples showcase how an elegant application of ML can achieve the desired goal while preserving privacy.

Biography:

John Apostolopoulos is VP/CTO of Cisco’s Enterprise Networking Business (Cisco’s largest business) where his work includes wireless (from Wi-Fi 6 to 5G), Internet of Things, multimedia networking, visual analytics, and ML and AI applied to the aforementioned areas. Previously, John was Lab Director for the Mobile & Immersive Experience (MIX) Lab at HP Labs. The MIX Lab conducted research on novel mobile devices and sensing, mobile client/cloud multimedia computing, immersive environments, video & audio signal processing, computer vision & graphics, multimedia networking, glasses-free 3D, wireless, and user experience design. John is an IEEE Fellow, IEEE SPS Distinguished Lecturer, named “one of the world’s top 100 young innovators” by MIT Technology Review, contributed to the US Digital TV Standard (Engineering Emmy Award), and his work on media transcoding in the middle of a network while preserving end-to-end security (secure transcoding) was adopted in the JPSEC standard. He published over 100 papers, receiving 5 best paper awards, and about 80 granted US patents. John was a Consulting Associate Professor of EE at Stanford. He received his B.S., M.S., and Ph.D. from MIT.


“VCO Design Challenges And Solutions For Mm-Wave Applications” by Dr. Waleed Khalil

Date: November 1st, 2019

“VCO Design Challenges And Solutions For Mm-Wave Applications”

Dr. Waleed Khalil, ElectroScience Lab, Ohio State University

Event Organized By:

Circuits and Systems Society (CASS) of the IEEE Santa Clara Valley Section

Co-sponsors:

PROGRAM:

6:00 – 6:30 PM Networking & Refreshments
6:30 – 7:45 PM Talk
7:45 – 8:00 PM Q&A/Adjourn

No broadcast and no Zoom recording.

REGISTRATION Link:

Here.

Abstract:

Over the past few decades, there has been a plethora of research on VCO architecture and circuit techniques that led to significant improvements across all performance measures. However, with much of the work being directed towards the sub 10 GHz frequency range, there is a need to clearly describe the set of challenges and offer a range of solutions that address the growing interest in mm-Wave systems.

This seminar will present first, at the fundamental level, key challenges that the designer faces when attempting to design and optimize the performance of mm-wave VCOs on silicon technologies.

In the second part, we will describe some of the techniques, that are validated on silicon at circuit architecture and layout levels, that can be utilized to significantly improve the tuning range, phase noise and power efficiency of mm-Wave VCOs, while still meeting the required robustness level. The talk is designed to spur analytical thinking on a variety of mm-Wave VCO design challenges, while also offering a new perspective in addressing these challenges.

Bio:

Waleed Khalil received his B.S. and M.S. degrees from the University of Minnesota and his PhD degree from Arizona State University, all in Electrical Engineering. He is currently serving as an Associate Professor at the ECE department and the ElectroScience Lab, The Ohio State University. Prior to joining OSU in 2009, he spent 16 years at Intel Corporation where he held various technical and leadership positions in wireless and wireline communication groups. At OSU, he leads a multidisciplinary research team in high performance clocking circuits, GHz data converters, digital intensive RF and mm-wave circuits and system as well as heterogeneous integration and hardware trust and assurance. His research group has been recognized with several awards, among them TSMC’s outstanding research award and best paper awards in several conferences. He authored over 100 journal and conference papers, 13 issued and several other pending patents, and three books/book chapters. He is a senior member of IEEE and serves as the general chair for the 2020 RFIC Symposium and as an Associate Editor for the Journal of Solid State Circuits.

Venue:

QualComm Santa Clara, Building B, 3165 Kifer Road, Santa Clara, CA 95051

 

Admission Fee:

All admissions free. Suggested donations to cover food and water:

Non-IEEE: $5, Students (non-IEEE): $3, IEEE Members (not members of CASS or SSCS): $3

Online registration is recommended to guarantee seating.


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