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Events on April, 2019

CASS Distinguished Lecturer Event “Flexible Radios And Flexible Networks” Dr. Alyssa Apsel

Date: April 25th, 2019

CASS Distinguished Lecturer Event

“Flexible Radios And Flexible Networks”

Dr. Alyssa Apsel, Cornell University

Event Organized By:

Circuits and Systems Society (CASS) of the IEEE Santa Clara Valley Section

Co-sponsors:

REGISTRATION:

Here.

PROGRAM:

6:00 – 6:30 PM Networking & Refreshments
6:30 – 7:45 PM Talk
7:45 – 8:00 PM Q&A/Adjourn

Zoom broadcast is TBD. In person attendance requested.

Abstract:

Over the past decades the world has become increasingly connected, with communications driving both markets and social movements. Low power electronics, efficient communications, and better battery technology have all contributed to this revolution, but the cost and power required for these systems must be pushed further to make cheap, ubiquitous, seamless communication accessible to a wider community. In this talk I will discuss two engineering approaches to this problem. I will look at various approaches to drive the power down in radio networks that span across circuits and systems. I will also look at creative biologically inspired approaches to enabling very low power networks and IoT. Finally, I will discuss how by adding flexibility and building reconfigurable hardware, we can likewise build lower power and less costly consumer systems that can adapt across protocols and networks and work under changing device technologies.

Bio:

Alyssa Apsel received the B.S. from Swarthmore College in 1995 and the Ph.D. from Johns Hopkins University, Baltimore, MD, in 2002. She joined Cornell University in 2002, where she is currently Director of Electrical and Computer Engineering. She was a Visiting Professor at Imperial College, London from 2016-2018. The focus of her research is on power-aware mixed signal circuits and design for highly scaled CMOS and modern electronic systems. Her current research is on the leading edge of ultra-low power and flexible RF interfaces for IoT. She has authored or coauthored over 100 refereed publications including one book in related fields of RF mixed signal circuit design, ultra-low power radio, interconnect design and planning, photonic integration, and process invariant circuit design techniques resulting in ten patents. She received best paper awards at ASYNC 2006 and IEEE SiRF 2012, had a MICRO “Top Picks” paper in 2006, received a college teaching award in 2007, received the National Science Foundation CAREER Award in 2004, and was selected by Technology Review Magazine as one of the Top Young Innovators in 2004. She is a Distinguished Lecturer of IEEE CAS for 2018-2019, and has also served on the Board of Governors of IEEE CAS (2014-2016) and as an Associate Editor of various journals including IEEE Transactions on Circuits and Systems I and II, and Transactions on VLSI. She has also served as the chair of the Analog and Signal Processing Technical committee of ISCAS 2011, is on the Senior Editorial Board of JETCAS, as Deputy Editor in Chief of Circuits and Systems Magazine, and as the co-founder and Chair of ISCAS Late Breaking News. In 2016, Dr. Apsel co-founded AlphaWave IP Corporation, a multi-national Silicon IP provider focused on multi-standard analog Silicon IP solutions for the world of IOT.

Venue:

QualComm Santa Clara, Building B, 3165 Kifer Road, Santa Clara, CA 95051

Live Broadcast:

TBD.

Admission Fee:

All admissions free. Suggested donations to cover food and water:

Non-IEEE: $5, Students (non-IEEE): $3, IEEE Members (not members of CASS or SSCS): $3

Online registration is recommended to guarantee seating.


“Enabling Wireless Autonomous Systems Using 5G” by Dr. Nageen Himayat, Intel Corporation

Date: April 11th, 2019

“Enabling Wireless Autonomous Systems Using 5G”

Dr. Nageen Himayat, Intelligent Distributed Edge Networks Labs, Intel Corporation

Registration Link:

Here.

Event Organized By:

Circuits and Systems Society (CASS) of the IEEE Santa Clara Valley Section

Co-sponsors:

PROGRAM:

6:00 – 6:30 PM Networking & Refreshments
6:30 – 7:45 PM Talk
7:45 – 8:00 PM Q&A/Adjourn

Zoom broadcast is TBD. In person attendance requested.

Abstract:

Enabling next generation of wireless autonomous systems (WAS), such as self-driving vehicles, industrial robots, drones, etc., promises huge economic as well as societal impact, but poses significant challenges in meeting the reliability, latency and scalability requirements of these safety critical applications. This talk will discuss some of these challenges, and highlight technologies that advance 5G/5G+ wireless networks, as well as co-design autonomous systems and wireless networks, towards addressing the stringent WAS requirements.

Bio:

Nageen Himayat is a Principal Engineer, and Director of Intelligent Distributed Edge Networks Labs, at Intel, where she conducts research on distributed learning and data centric protocols over 5G/5G+wireless networks. Her research contributions span areas such as machine learning for wireless, millimeter wave and multi-radio heterogeneous networks, cross layer radio resource management, and non-linear signal processing techniques.

Prior to Intel, Dr. Himayat was with Lucent Technologies and General Instrument Corp, where she developed standards and systems for both wireless and wire-line broadband access networks. Dr. Himayat obtained her B.S.E.E degree from Rice University, and her Ph.D. degree from the University of Pennsylvania. She also holds an MBA degree from the Haas School of Business at University of California, Berkeley.

Venue:

QualComm Santa Clara, Building B, 3165 Kifer Road, Santa Clara, CA 95051

Live Broadcast:

TBD.

Admission Fee:

All admissions free. Suggested donations to cover food and water:

Non-IEEE: $5, Students (non-IEEE): $3, IEEE Members (not members of CASS or SSCS): $3

Online registration is recommended to guarantee seating.


“eFPGA technology – for Compute, Network and Storage Acceleration”, Volkan Oktem

Date: April 10th, 2019

Event organized by Chip Chat, co-sponsored by Circuits and Systems Society.

TOPIC:
“eFPGA technology – for Compute, Network and Storage Acceleration”
The speaker , Volkan Oktem, Senior Director of Product Applications at Achronix Semiconductor will discuss the eFPGA technology and how Achronix Speedcore Customizable eFPGA Technology achieves this acceleration for the modern day workloads.

SPEAKERS BIO:

Volkan Oktem is the Senior Director of Product Applications at Achronix Semiconductor. Volkan has 13 years’ of experience in the semiconductor and FPGA industry. Prior to joining Achronix, Volkan worked in various production test and applications engineering roles at Altera Corporation, driving quality and customer solutions on 65nm, 40nm and 28nm high-end Stratix FPGAs. After joining Achronix in 2012, Volkan has built the applications organization to provide world class pre- and post-sales technical support, to generate collateral for standalone and embedded FPGA products, and to support engineering with bring-up and product planning. Volkan holds a B.S. from Lafayette College and a M.S. from Georgia Institute of Technology, both in Electrical and Computer Engineering.

AGENDA :
6:30pm – 7:00pm – Registration and Networking
7:00pm – 8:00pm – Talks
8:00pm – 8:30pm – Networking

LOCATION:

Synopsys Building B

690 E Middlefield Rd, Mountain View, CA 94043

REGISTRATION:

https://www.meetup.com/Chip-Chat/events/260208231/

NOTES :

1. Admission is free.

Suggested donation is $5/- to cover the expenses at Registration.
– Cash
– Venmo to chatchip6@gmail.com
– Onsite Credit Card payment

2. Confidential Information will not be discussed. Audience is requested
to refrain from asking questions related to confidential information.


ValleyML.ai Event: State of AI and ML-Spring 2019

Date: April 4th, 2019

Description

Please visit this event page for more details.

In this event as part of series of regularly planned events, we plan to cover the state-of-the art advances in AI technology. For this event, we focus on AI Accelerators, Self-Driving and Face Processing. We feature five thought leaders from Computing, Autonomous systems and Computer Vision.

Each talk is 45 minutes followed by 10 minutes for Q&A.

Check In: 1.00pm-1.30pm

Key Note : “Emergence of RISC-V computer architecture: embedded applications and machine learning acceleration”, Dr. Zvonimir Bandić, Sr. Director of Next Generation Platform Technologies at Western Digital Corporation, Board of Directors member of RISC-V foundation. 1.30pm-2.25pm

Talk 2:“Accelerating Deep Neural Network Inference with FPGAs”, Mr. Rahul Nimaiyar, Director, Data Center IP Solutions at Xilinx. 2.30pm-3.25pm

Talk 3 “An ASIC approach to unlock deep learning innovation”, Dr. Carlos Macian, Sr. Director AI Strategy and Products at eSilicon. 3.30pm-4.25pm

Break for Networking and Snacks: 4.25pm-5.00pm

Talk 4: “Expectations from an AI Co-Processor for ADAS and Autonomous Driving”, Dr. Vikram Narayan, Head of AI & Computer Vision, the ADAS Group of Visteon Corporation, 5.00pm-5.55pm

Talk 5: “Introduction to Face Processing with Computer Vision”, Mr.Gabriel Bianconi, Founder, Scalar Research, 6:00pm-6.55pm

Program Chair: Dr. Kiran Gunnam, Distinguished Engineer – Machine Learning & Computer Vision

Please visit this event page for more details.

See this direct link for program schedule, speaker bios and abstracts.


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