IEEE CEDA held a Joint Seminar.
Date/Time: 2017 August 30 (Wed) 14:00-15:00
Location: Ritsumeikan University, System-level Design Methodology Laboratory@ 4F, East Wing, Biwako-Kusatsu Campus
http://www.ritsumei.ac.jp/campusmap/bkc/
Title: Runtime Co-optimisation of Cores, Caches, and On-chip Network
Speaker: Preeti Ranjan Panda (IIT Delhi, India)
