Upcoming Event (22, Jan. 2015): IEEE CASS/CEDA Joint Seminar at 20th Anniversary of ASP-DAC

Date/Time: 2015 January 22 (Thu) 12:30-13:35
Location: Makuhari Messe, International Conference Halls, 1F, Multi-Purpose Room
(幕張メッセ 国際会議場 1階 多目的ルーム)

No Admission Charge.
Limited light meal will be provided on a first-come-first-serve basis.


Meeting Agenda:

(0) Opening 12:30-12:35

(1) Lecture 1: 12:35-13:05
Title: My Take on ASP-DAC at its 20th Anniversary
Speaker: David Z. Pan (The University of Texas at Austin)


This year marks the 20th anniversary of the ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC). Interestingly, the first ASP-DAC was held in the late summer of 1995, but the second ASP-DAC was moved to Jan. 1997, which became a standard timeline for ASP-DAC. I was a PhD student at UCLA around that time, just venturing into the new world of EDA from a Physics background, knowing almost nothing about IC and CAD. Luckily I have had the great fortune to study under Prof. Jason Cong, my PhD advisor at UCLA. I published my first ASP-DAC paper in 1999. However, it is not until 2005 that I had my first physical attendance of ASP-DAC. I really enjoyed the conference: great talks, networking, culture/touring, and of course food! ASP-DAC becomes a premier EDA conference to which my students and I submit papers regularly. To my surprise, I have published 30 papers now at ASP-DAC. I also have the fortune, along with my students, of winning the best paper award (BPA) twice (2010 and 2012), and having three other papers nominated for BPA (2006, 2008, 2013). ASP-DAC is definitely a key venue for my group to publish initial and important results. I think this applies not only to me, but also to others in the field. In this talk, I will provide my personal history and perspective on ASP-DAC.

Speaker’s biography: 

David Z. Pan received his BS degree from Peking University, and MS/PhD degrees from UCLA. He was a Research Staff Member at IBM T. J. Watson Research Center from 2000 to 2003. He is currently the Engineering Foundation Professor at the Department of Electrical and Computer Engineering, UT Austin. He has published over 200 refereed journal and conference papers. He has served in many journal editorial boards (TCAD, TVLSI, TCAD-I, TCAS-II, TODAES, SCIS, JCST, etc.) and conference organizing/program committees (DAC, ICCAD, DATE, ASPDAC, ISLPED, ISPD, etc.). He is a working group member of the International Technology Roadmap for Semiconductor (ITRS). He has received a number of awards, including the SRC 2013 Technical Excellence Award, 11 Best Paper Awards (ISPD 2014, ICCAD 2013, ASPDAC 2012, ISPD 2011, IBM Research 2010 Pat Goldberg Memorial Best Paper Award in CS/EE/Math, ASPDAC 2010, DATE 2009, ICICDT 2009, SRC Techcon in 1998, 2007 and 2012), DAC Top 10 Author Award in Fifth Decade, DAC Prolific Author Award, Communications of the ACM Research Highlights (2014), ACM/SIGDA Outstanding New Faculty Award (2005), NSF CAREER Award (2007), SRC Inventor Recognition Award three times, IBM Faculty Award four times, UCLA Engineering Distinguished Young Alumnus Award (2009), ISPD Routing Contest Awards (2007), eASIC Placement Contest Grand Prize (2009), ICCAD’12 and ICCAD’13 CAD Contest Awards, among others. He is an IEEE Fellow.

(2) Lecture 2: 13:05-13:35
Title: Design for Manufacturability for the Next Decade and Beyond
Speaker: Yao-Wen Chang (National Taiwan University)


I gave my first ASP-DAC invited paper in 2007 on then emerging challenges in physical design for manufacturability/reliability such as optical proximity correction, chemical mechanical polishing, antenna effect, redundant via. Those challenges dominated the manufacturability research in the past decade. As process nodes keep shrinking, the semiconductor industry faces even more severe emerging manufacturing challenges. In this talk, we address most expected technologies that may push the limits of lithography in the next decade and beyond, including multiple patterning lithography, extreme ultraviolet lithography, electron beam lithography, and directed self-assembly. We investigate critical design challenges of these technologies and highlight some current solutions. Finally, we provide some future research directions for the addressed technologies, which could contribute to the continuing scaling of the CMOS technology.

Speaker’s biography:

Yao-Wen Chang received the B.S. degree from National Taiwan University (NTU) in 1988, and the M.S. and Ph.D. degrees from the University of Texas at Austin in 1993 and 1996, respectively, all in computer science. He is currently a Distinguished Professor of the Dept. of Electrical Engineering and Associate Dean of the EECS College, NTU. He was the chairman of the Graduate Institute of Electronics Engineering of NTU from 2010 to 2013, a visiting professor of Waseda University, Japan from 2005 to 2010, and a visiting scholar of MIT, USA in 2014. His current research interests lie in electronic design automation (EDA). He has co-edited one textbook on EDA and coauthored one book on routing and over 250 ACM/IEEE conference/journal papers, including a few highly cited papers on floorplanning, placement, routing, manufacturability, and FPGA design. His NTUplace3 placer was the core engine of the popular Custom Digital Placer of SpringSoft, acquired by the #1 EDA vendor, Synopsys, for US $400 million in 2012.

Dr. Chang received four awards at the 50th Design Automation Conference (DAC) in 2013 for the 1st Most Papers in DAC’s 5th Decade (34 papers; #1 worldwide), etc. He is a 5-time 1st-place winner of recent ACM/IEEE EDA contests on placement, clock network synthesis, gate sizing, and timing analysis, and a recipient of six best paper awards and 24 best paper nominations from DAC (five times), ICCAD (four times), etc. He has received many awards, such as the Distinguished Research Award from the Ministry of Science and Technology of Taiwan (three times), the IBM Faculty Awards (three times), MXIC Young Chair Professorship, and distinguished (highest honor) and excellent teaching awards from NTU (eight times).

Dr. Chang is an IEEE Fellow and currently the IEEE CEDA Vice President of Technical Activities. He has served on the editorial boards of important journals, including IEEE TCAD, IEEE TVLSI, IEEE Design and Test of Computers, IET Computers & Digital Techniques, etc. He has also served as program / general chairs of ICCAD, program / general / steering committee chairs of ISPD, and program chairs of ASP-DAC and FPT, and is on the IEEE CEDA Executive Committee, the ICCAD Executive Committee, and the ASP-DAC Steering Committee. He has also served as an independent board director of Genesys Logic, a technical consultant of Faraday, MediaTek, and RealTek, chair of the EDA Consortium of Taiwan-MOE, and a member of the Board of Governors of Taiwan IC Design Society.

sponsored by
IEEE CASS Japan/Fukuoka/Kansai/Shikoku Chapters
IEEE CEDA All Japan Joint Chapter


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