Tutorial 2

Extreme Efficiency Power Electronics


Sunday, June 22. 17:00-18:30
Room 23

Speaker Detail:

KolarJohann W. Kolar is a Fellow of the IEEE and received his M.Sc. and Ph.D. degree (summa cum laude) from the University of Technology Vienna, Austria. He is currently a Full Professor and the Head of the Power Electronic Systems Laboratory at the Swiss Federal Institute of Technology (ETH) Zurich. Dr. Kolar has proposed numerous novel PWM converter topologies, and modulation and control concepts, e.g., the Vienna Rectifier, the Swiss Rectifier, and the Three-Phase AC-AC Sparse Matrix Converter and has published over 600 scientific papers in international journals and conference proceedings and has filed more than 100 patents.


Driven by the relatively high overall losses of the power supply chain of datacenters and telecom installations and the increase in environmental consciousness, as well as rising energy costs, raising the efficiency of AC/DC and DC/DC converter stages has become a primary development goal of power electronics for IT industry. In this Tutorial a generalized description and an overview of degrees of freedom and selected measures for efficiency improvement of power electronics converters is given. The background of all considerations is formed by single-phase PFC rectifier systems, but the concepts shown are fundamental and fully applicable also for other converter systems.

First, the influence of the main loss components of a converter on the converter efficiency characteristic over the output power is discussed. Subsequently, a detailed analysis of the possibilities of minimizing the semiconductor losses, and the losses of the passive components including the EMI filter, and the power requirements of the auxiliary systems in the course of the design process are given. It is shown, that e.g. by switching frequency modulation or selection of an optimum current ripple ratio a considerable reduction of the EMI filter realization effort could be achieved, which finally also results in higher converter efficiency.

Furthermore, control procedures and topological concepts, i.e. symmetric and asymmetric interleaving of parallel connected converter stages are discussed to maximise the efficiency in the partial load range and again minimize the EMI filtering effort. In this context also a resonant transition mode ZVS converter system with triangular shaped input current (TCM) is presented, that in combination with interleaving allows to attain efficiencies significantly over 99% without the use of SiC semiconductors. Next, besides the parallel connection of converter cells also the series association of converter cells employing low voltage MOSFETs is discussed and the general scaling laws for parallel and series connection of converter cells are derived. Furthermore, partial power conversion and limitation of the operation voltage range of power converters, e.g. by series-parallel reconfiguration of converter stages are shown as options for increasing the efficiency of power conversion.

In a next step the accuracy of the input and output power measurement required for measuring highest efficiencies is clarified, whereby the advantage of a direct loss measurement by means of a calorimeter becomes immediately clear.

Finally, results of measurements on a demonstrator of a CCM single-phase PFC rectifier system with 99.1% maximum efficiency and η>99% above half rated power, and on a TCM PFC rectifier system with ηmax=99.3% and η>99% above 15% rated power are presented. In addition, a 3.3 kW telecom rectifier module comprising 3 interleaved single-phase TCM PFC rectifier input stages and two parallel DC/DC converter output stages which features 3.3kW/dm3 power density and 97% efficiency at 50% rated load is presented. Furthermore, the technological boundaries that limit the maximum efficiency of a converter are clarified by detailed analysis of the loss contributions of different PFC rectifier systems optimized for high power density or high efficiency. In conclusion, the general mapping of the Design Space of a power converter into the Performance Space which is bounded by the Pareto Front is discussed and experimentally verified with measurements results of the aforementioned PFC rectifier systems and it is highlighted that always a compromise has to be made between efficiency and power density of a power electronics converter system.

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