IEEE-IEM eETD Mini Colloquium

Organizer: IEEE Malaysia ED/MTT/SSC Penang Joint Chapter
Co-organizer: Electronic Engineering Technical Division (eETD), The Institution of Engineers Malaysia

Date: September 24, 2016 (Saturday)
Venue: PSDC, 1 Jalan Sultan Azlan Shah, 11900 Bayan Lepas, Penang, Malaysia
Admission: Free of Charge
CPD: Applying

Program

11:00am – 12:00pm – Distinguished Lecture 1
12:00pm – 12:30pm – Refreshment
12:30pm – 01:30pm – Distinguished Lecture 2
01:30pm – 02:30pm – Invited Technical Talk

Registration

Name: ________________________________________  Email: ______________________________

IEEE Membership No.: ____________________ (for IEEE members)

IEM Membership No.: ____________________ (for IEM members)

PE No.: ____________________ (for PE registered with BEM)

IEM members could register via IEM Penang branch secretariat
Tel: +60-4-8182045 Fax: +60-4-2264490
Email: iempenangbranch@gmail.com

Distinguished Lecture 1 – Embedded flash memory: technology, circuits to systems and MCU/SOC applications by Dr Hideto Hidaka

Abstract

Since its inception in early 1990’s, embedded flash memory (eFlash) for MCU applications has realized a revolutionary advancements by programmable instruction functions, which has proliferated in all the segments in MCU market for embedded system applications and has reached 28nm development today. This eFlash innovation has its roots in reducing the overall cost of products and embedded system development by programmable instruction functions to support consistent market growth.

Break-through technology and applications in automotive, security, and low-power applications are reviewed with insights into future prospects of application-driven non-volatile memory technology in the era of advanced automotive systems and of IoE (Internet of Everything). Trials on technology convergence scheme and future prospects of embedded non-volatile memory in the new memory hierarchy are also described.

1. MCU with eFlash technology; history and prospects over 20 years
2. Family of eFlash technology and use cases, eFlash innovation study
3. eFlash technology, architecture, circuits and sub-system design evolution
4. Meaning of non-volatility and programmability and its impact on the VLSI evolutions
5. Trends and future prospects in eFlash and eNVM required by auto-motive, cellular phone, and emerging IoE applications

Distinguished Lecturer 1

Hideto Hidaka earned the B.S., M.S., and Ph.D. degrees in electronic engineering from the University of Tokyo, Tokyo, Japan. In Mitsubishi Electric, Renesas Technology, and Renesas Electronics he has been engaged in the research and development of high-density, application-specific, and embedded aspects of DRAM technology and circuits, embedded-flash memory for MCU, embedded non-volatile memory technology, and related technology platforms and analog IPs for MCU and SOC products.

Since 2005 he and his team have created the world’s first split-gate embedded SONOS flash memory for MCU products at 90 nm technology node, which changed the MCU technology trend for automotive applications in performance, power, and reliability advantages. He led this development into market dominance to make a de-facto standard in MCU applications, which was followed by successful 40 nm and 28 nm SONOS-eFlash development. He has consistently led the MCU technology and business strategies enabling the world’s No.1 MCU market share position by Renesas Electronics now, where he was responsible for R&D in all the embedded non -volatile memories and technology platforms for MCU products. He is now the Senior Vice-President and Chief Technology Officer at Renesas Electronics Corporation. responsible for all the corporate R&D activities.

He has authored and co-authored more than 60 journal papers and conference papers, as well as 293 US patents and 193 Japanese patents issued. He was a visiting scientist at the Media Laboratory, MIT, in 1987–88, and he has been a lecturer for a graduate course at the Tokyo Institute of Technology, Tokyo, in 2013–2015 Dr. Hidaka has served on program committees of technical conferences: ISSCC by the Memory Subcommittee Chair, Program Committee (ITPC) Vice-chair and Chair (2012), as well as A-SSCC, ICICDT, VLSI-TSA, IEICE-ICD, and ICDV. He is a member of the IEEE SSCS Adcom, an Associate Editor of JSSC, a Steering Committee member of Trans. VLSI Systems, an advisory board member for the IEEE SSCS Magazine, and Chair of IEEE-SSCS Kansai Chapter. He is an SSCS Distinguished Lecturer in 2015–2016.

Distinguished Lecture 2 – Smart Image Sensors and applications to 3D range-finding by Dr Makoto Ikeda

Abstract

This lecture will highlight several 3-D range-finding techniques, including, high-speed 3-D range-finding techniques based on light-section method(1D projection), time-encoded pattern projection method(2D projection), lockin-pixel and SPAD techniques based on ToF.  Followed by asics of each techniques, this lecture will cover both device structure optimized for each techniques, and circuits optimization to maximize their performance.

Distinguished Lecturer 2

Makoto Ikeda received the BE, ME, and Ph.D. degrees in electrical engineering from the University of Tokyo, Tokyo, Japan, in 1991, 1993 and 1996, respectively. He joined the University of Tokyo as a research associate, in 1996, and now professor at the department of electrical engineering and information systems. At the same time he has been involving the activities of VDEC (VLSI Design and Education Center, the University of Tokyo), to promote VLSI design educations and researches in Japanese academia. He worked for asynchronous circuits design, smart image sensor for 3-D range finding, and time-domain circuits for associate memories. He has published more than 230 technical publications, including 10 invited papers, and 7 books/chapters. He has been serving various positions of various international conferences, including ISSCC IMMD sub-committee chair (ISSCC 2015), A-SSCC 2015 TPC Chair, VLSI Circuits Symposium PC Chair (will be for 2016/2017). He is a member of IEEE, IEICE Japan, IPSJ and ACM.

Invited Technical Speak – Packaging and Reliability for MEMS by Dr. Alastair Trigg

Abstract

In the last two decades MEMS devices have become ubiquitous in almost all aspects of our lives, particularly in the cars we drive and the phones we use. By modifying the fabrication techniques originally developed for integrated circuits, microscopic devices are created which match or exceed the performance of their conventional counterparts but are far smaller, lighter and cheaper. But MEMS devices present considerable challenges in packaging and reliability.

Unlike conventional IC chips, which can be considered as fairly robust, monolithic blocks, most MEMS have easily damaged, delicate moving parts which cannot withstand conventional IC packaging approaches. Moreover, many MEMS sensors need to be exposed to the outside world so unique packaging solutions are needed. Indeed packaging is usually a key part of the overall design and functionality of the device; it cannot be an afterthought.

MEMS can suffer from unique failure mechanisms that don’t affect conventional ICs, stiction, electrostatic charging, fatigue and wear are key examples.

The talk will highlight some of the packaging and reliability challenges, together with examples of solutions which have enabled MEMS devices to play such an important role in our lives.

Invited Speaker

After obtaining his PhD from University of London, Dr. Alastair Trigg worked in Microelectronics R&D for over three decades, at GEC Marconi Research in the UK and at the Institute of Microelectronics in Singapore. He has worked extensively in thick and thin film ceramic hybrid technology, multichip modules, three D chipstacks, failure analysis, materials characterization, reliability and surface analysis and was responsible for reliability aspects of all the advanced packaging projects at IME between 2009 and 2014.

He is a member of the Electronic Devices Failure Analysis Society (EDFAS), Senior Member of IEEE and has been active in the IEEE Singapore Electron Devices, CPMT and Reliability Chapter and in the annual IPFA conference organized by the Chapter.