“Characterization and Modeling of MOSFET Flicker Noise for RFIC Design” by Professor YuHua Cheng, Peking University.  Dean of Shanghai Research Institute of Microelectronics, China.  IEEE Fellow.

Date:  May 3, 2011 (Tuesday)
Time:  7:00 pm – 8:30 pm
Venue:  PSDC, Room 1202, 1 Jalan Sultan Azlan Shah, 11900 Bayan Lepas, Penang, Malaysia

Admission is free.  Refreshments will be served at 6:30 pm.

Network and interact with like-minded engineers and researchers before the seminar begins.

Abstract

This talk reviews the results of the flicker noise characterization and modeling of MOSFETs for RF IC design.  The dependencies of flicker noise characteristics to process parameters, such as the thickness and quality of gate oxide, and the device parameters, such as the channel length/width and fingers, have been summarized to better understand the flicker noise behavior and develop physical and accurate flicker noise models.  The physical origin of the flicker noise and the issues of the existing compact models in predicting the flicker noise characteristics have been also discussed.  Furthermore, the impact of flicker noise to the phase noise of RF circuits is studied while looking for either process or circuit approaches to reduce the influence of flicker noise contribution to the circuit noise. Finally, some modeling approaches are proposed to improve existing compact flicker noise models to predict the noise behavior of RF circuits well.

Speaker

Yuhua Cheng received the Ph.D. degree from the Institute of Microelectronics, Tsinghua University, Beijing, China in 1989.

In 1990, he joined in the Institute of Microelectronics (IME), Peking University, China. From 1992 to 1996, he was an associate professor in IME. From 1994 to 1995, he worked at the Norwegian University of Science and Technology, Trondheim, Norway, as a Visiting Professor and a Research Fellow of the Norwegian National Research Council. From 1995 to 1997, he was a Senior Research Scientist at the Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, where he was working on the development of BSIM3v3 (Berkeley Short-channel IGFET Model 3 version 3). He was the project coordinator and one of the principal contributors of the BSIM3v3, which was chosen as the first industry standard compact model for IC simulation by Electronics Industry Association/Compact Model Council and given an R&D 100 Award in 1996.

In 1997, he worked at Cadence Design Systems and then joined Rockwell International. From 1997-2004, he worked at Rockwell Semiconductor Systems, Conexant Systems (a spin-off from Rockwell), and Skyworks Solutions (a spin-off from Conexant), where he was a Principal Engineer, a Manager, and a Senior Manager. From 2004-2006, he was with Siliconlinx, Inc., which offers products and services to bridge the gap between IC designers and manufacturing foundries. He is now with Peking University, as a full professor and the Dean of Research Institute of Microelectronics, newly established in Shanghai.

He has served on many Technical Program Committees and chaired numerous Sub-committees at international conferences, including the IEEE Custom Integrated Circuits Conference (CICC) since 2001 and Radio Frequency Integrated Circuits Symposium since 2002.  He organized and participated in numerous workshops and panels related to RFCMOS technology and SoC design. He has authored and co-authored over 130 research papers, 30 more patents, two book chapters, two books “MOSFET Modeling & BSIM3 User’s Guide” by Kluwer Academic Publishers (1999), and “Device modeling for analog/RF circuit design” by John Wiley and Sons (2002).

He is an IEEE fellow and members of both Electron Devices Society (EDS) and Solid-State Circuit Society (SSCS). He is an IEEE Distinguished Lecturer of EDS. He is a member of compact model technical committee of IEEE/EDS. His research interests include advanced RFCMOS technology, analog/mixed-signal/RF circuit designs for system integration applications.